Struct rz80::CPU
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pub struct CPU { pub reg: Registers, pub halt: bool, pub iff1: bool, pub iff2: bool, pub invalid_op: bool, pub mem: Memory, // some fields omitted }
Z80 CPU emulation
The core of the CPU emulation is the step() method, this fetches the next instruction from the memory location pointed to by the PC register, executes the instruction, handles any pending interrupt request, and finally returns the number of cycles taken.
An object implementing the Bus trait must be handed to the step() method which is called if the CPU needs to communicate with the 'outside world'.
The CPU emulation uses an 'algorithmic decoder' as described here: http://www.z80.info/decoding.html, and implements most undocumented behaviour like the X/Y flags, the WZ register, and all undocumented instructions. The emulation is good enough to run the ZEXALL tests without errors.
What's not implemented: - interrupt modes 0 and 1 - non-maskable interrupts (including the RETN instruction) - extra memory wait states
Examples
Load and execute a small test program:
use rz80::{CPU, Bus}; // a dummy Bus trait implementation struct DummyBus; impl Bus for DummyBus { }; let mut cpu = CPU::new(); let bus = DummyBus { }; // map some writable memory to address 0x0000 cpu.mem.map(0, 0x00000, 0x0000, true, 0x1000); // a little Z80 machine code program to add 2 numbers let prog = [ 0x3E, 0x11, // LD A,0x11 (7 cycles) 0x06, 0x22, // LD B,0x22 (7 cycles) 0x80, 0x33, // ADD A,B (4 cycles) ]; // put the program at address 0x0100 cpu.mem.write(0x0100, &prog); // set PC to address 0x0100 cpu.reg.set_pc(0x0100); // execute 3 instructions let mut cycles = 0; for _ in 0..3 { cycles += cpu.step(&bus); } assert!(cpu.reg.a() == 0x33); assert!(cycles == 18);
Fields
reg: Registers
halt: bool
iff1: bool
iff2: bool
invalid_op: bool
mem: Memory
Methods
impl CPU
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fn new() -> CPU
initialize a new Z80 CPU object
fn new_64k() -> CPU
initialize a new CPU object with 64K RAM (for testing)
fn reset(&mut self)
reset the cpu
fn step(&mut self, bus: &Bus) -> i64
decode and execute one instruction, return number of cycles taken
fn irq(&mut self)
request an interrupt (will initiate interrupt handling after next instruction)
fn halt(&mut self)
execute a halt instruction